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A Novel Second Order Phase Locked Loop with Adaptive Adjusted Bandwidth
Electronic Science and Technology
2019, 32 (1):
1-4.
DOI: 10.16180/j.cnki.issn1007-7820.2019.01.001
The large acquisition bandwidth presents a significant challenge to traditional second-order phase locked loops. On the basis of the contradiction of larger acquisition bandwidth and noise reduction capabilities, a novel second-order PLL which was coupled with a nonlinear element, was introduced in this paper. The loop noise bandwidth was adaptively adjusted by the nonlinear element. The frequency error was reduced more quickly with a larger bandwidth when the frequency error was large. By contrast, the noise was suppressed with a smaller bandwidth to improve the tracking accuracy when the frequency error was reduced due to the control effect of the loop. The simulation results indicated that the tracking speed of the proposed nonlinear second order PLL was significantly increased and the acquisition bandwidth was increased from 4 kHz to 18.8 kHz. 
Figure 4.
Performance of PLL phase error without frequency offset
(a)The phase error without frequency deviation(b)The phase error after 2.95 ms
Extracts from the Article
测试条件1环路输入角频率ωo=2π×2e5 rad/s,输入噪声为ni=0.01×sin(1e4×t),环路输入输出相位误差如图4所示。由图4(a)可以看出,NPLL1和NPLL2都比传统锁相环更快的锁定,而由于NPLL2是一种线性放大结构,在环路工作的末段没有利用较小的ml去抑制噪声,所以NPLL2比NPLL1能更快实现锁定。但从图4(b)可以看出NPLL2相位误差抖动较大,抑制噪声能力变差,因此线性放大结构未从本质解决环路跟踪速度与跟踪精度之间的矛盾。而NPLL1的相位误差抖动与传统锁相环相比相差不大,说明NPLL1利用环路工作末段ml的压缩作用实现了抑制噪声的能力,同时利用mh的放大作用提高了环路的捕获跟踪速度,调和了传统锁相环路捕获跟踪速度与跟踪精度之前的矛盾。
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